Initial project setup
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set(MCU_VARIANT stm32h723xx)
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set(JLINK_DEVICE stm32h723zg)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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STM32H723xx
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HSE_VALUE=8000000
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)
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endfunction()
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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/* metadata:
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name: STM32 H723 Nucleo
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url: https://www.st.com/en/evaluation-tools/nucleo-h723zg.html
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define UART_DEV USART3
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#define UART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE
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// VBUS Sense detection
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#define OTG_FS_VBUS_SENSE 1
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#define OTG_HS_VBUS_SENSE 0
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// STM32F723 has only one USB HS peripheral
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// Nucleo board does not have ULPI so USB will operate in FS mode only
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// For the rest of the synopsys driver it is FS device however there
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// is only USB_OTG_HS defined. Here are required conversions to
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// make peripheral FS.
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#define __HAL_RCC_USB2_OTG_FS_CLK_ENABLE __HAL_RCC_USB1_OTG_HS_CLK_ENABLE
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#define GPIO_AF10_OTG2_HS GPIO_AF10_OTG1_HS
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#define USB_OTG_FS USB_OTG_HS
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#define PINID_LED 0
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#define PINID_BUTTON 1
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#define PINID_UART_TX 2
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#define PINID_UART_RX 3
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#define PINID_VBUS0_EN 4
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static board_pindef_t board_pindef[] = {
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{ // LED
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.port = GPIOB,
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.pin_init = { .Pin = GPIO_PIN_0, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
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.active_state = 1
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},
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{ // Button
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.port = GPIOC,
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.pin_init = { .Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
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.active_state = 1
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},
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{ // UART TX
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.port = GPIOD,
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.pin_init = { .Pin = GPIO_PIN_8, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = GPIO_AF7_USART3 },
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.active_state = 0
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},
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{ // UART RX
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.port = GPIOD,
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.pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = GPIO_AF7_USART3 },
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.active_state = 0
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},
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{ // VBUS0 EN
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.port = GPIOD,
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.pin_init = { .Pin = GPIO_PIN_10, .Mode = GPIO_MODE_OUTPUT_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
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.active_state = 0
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}
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};
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//--------------------------------------------------------------------+
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// RCC Clock
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//--------------------------------------------------------------------+
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static inline void SystemClock_Config(void)
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
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RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
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/* The PWR block is always enabled on the H7 series- there is no clock
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enable. For now, use the default VOS3 scale mode (lowest) and limit clock
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frequencies to avoid potential current draw problems from bus
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power when using the max clock speeds throughout the chip. */
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/* Enable HSE Oscillator and activate PLL1 with HSE as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
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RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
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RCC_OscInitStruct.PLL.PLLN = 336;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLQ = 7;
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RCC_OscInitStruct.PLL.PLLR = 2; /* Unused */
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_0;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | \
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RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | \
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RCC_CLOCKTYPE_D3PCLK1);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
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/* Unlike on the STM32F4 family, it appears the maximum APB frequencies are
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device-dependent- 120 MHz for this board according to Figure 2 of
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the datasheet. Dividing by half will be safe for now. */
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RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
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RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
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/* 4 wait states required for 168MHz and VOS3. */
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
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/* Like on F4, on H7, USB's actual peripheral clock and bus clock are
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separate. However, the main system PLL (PLL1) doesn't have a direct
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connection to the USB peripheral clock to generate 48 MHz, so we do this
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dance. This will connect PLL1's Q output to the USB peripheral clock. */
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RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 };
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
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HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct);
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}
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static inline void board_init2(void) {
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// For this board does nothing
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}
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void board_vbus_set(uint8_t rhport, bool state) {
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if (rhport == 0) {
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board_pindef_t* pindef = &board_pindef[PINID_VBUS0_EN];
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HAL_GPIO_WritePin(pindef->port, pindef->pin_init.Pin, state == pindef->active_state ? GPIO_PIN_SET : GPIO_PIN_RESET);
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}
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -0,0 +1,10 @@
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MCU_VARIANT = stm32h723xx
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CFLAGS += -DSTM32H723xx -DHSE_VALUE=8000000
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LD_FILE_GCC = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash.ld
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# For flash-jlink target
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JLINK_DEVICE = stm32h723zg
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# flash target using on-board stlink
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flash: flash-stlink
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