Initial project setup
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MEMORY {
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ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x00020000 /* 128kB ROM */
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FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 0x00340000
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SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00100000
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/*
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* Note that CS0/CS1 address mappings may be reversed using MXC_HPC->mbr0 and ->mbr1
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* The following mappings are selected for simplicity
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*/
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HPB_CS0 (rwx) : ORIGIN = 0x60000000, LENGTH = 0x10000000 /* External Hyperbus/Xccelabus chip select 0 */
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HPB_CS1 (rwx) : ORIGIN = 0x70000000, LENGTH = 0x10000000 /* External Hyperbus/Xccelabus chip select 1 */
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}
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SECTIONS {
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.rom :
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{
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KEEP(*(.rom_vector))
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*(.rom_handlers*)
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} > ROM
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.text :
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{
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_text = .;
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KEEP(*(.isr_vector))
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EXCLUDE_FILE (*riscv.o) *(.text*) /* program code, exclude RISCV code */
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*(.rodata*) /* read-only data: "const" */
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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/* C++ Exception handling */
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KEEP(*(.eh_frame*))
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_etext = .;
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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/* These sections allow code to be compiled/linked for HPB addresses, but reside in
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* flash until copied by code to the external HPB flash device
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*/
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.hpb_cs0_section :
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{
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__hpb_cs0_start = ABSOLUTE(.);
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KEEP(*(.hpb_cs0_section*))
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} > HPB_CS0 AT>FLASH
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__load_start_hpb_cs0 = LOADADDR(.hpb_cs0_section);
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__load_length_hpb_cs0 = SIZEOF(.hpb_cs0_section);
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.hpb_cs1_section :
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{
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__hpb_cs1_start = ABSOLUTE(.);
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KEEP(*(.hpb_cs1_section*))
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} > HPB_CS1 AT>FLASH
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__load_start_hpb_cs1 = LOADADDR(.hpb_cs1_section);
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__load_length_hpb_cs1 = SIZEOF(.hpb_cs1_section);
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/* Binary import */
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.bin_storage :
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{
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FILL(0xFF)
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_bin_start_ = .;
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KEEP(*(.bin_storage_img))
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_bin_end_ = .;
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. = ALIGN(4);
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} > FLASH
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/* it's used for C++ exception handling */
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/* we need to keep this to avoid overlapping */
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.ARM.exidx :
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{
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__exidx_start = .;
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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__exidx_end = .;
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} > FLASH
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.data :
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{
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_data = ALIGN(., 4);
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*(vtable)
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*(.data*) /*read-write initialized data: initialized global variable*/
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/* These array sections are used by __libc_init_array to call static C++ constructors */
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE_HIDDEN (__fini_array_end = .);
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/* Run the flash programming functions from SRAM */
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*(.flashprog)
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_edata = ALIGN(., 4);
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} > SRAM AT>FLASH
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__load_data = LOADADDR(.data);
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.bss :
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{
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. = ALIGN(4);
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_bss = .;
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*(.bss*) /*read-write zero initialized data: uninitialized global variable*/
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*(COMMON)
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_ebss = ALIGN(., 4);
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} > SRAM
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/* Set stack top to end of RAM, and stack limit move down by
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* size of stack_dummy section */
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__StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
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__StackLimit = __StackTop - SIZEOF(.stack_dummy);
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/* .stack_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later */
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.stack_dummy (COPY):
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{
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*(.stack*)
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} > SRAM
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.heap (COPY):
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{
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. = ALIGN(4);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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*(.heap*)
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__HeapLimit = ABSOLUTE(__StackLimit);
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} > SRAM
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack")
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}
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