Initial project setup
This commit is contained in:
@@ -0,0 +1,11 @@
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set(MCU_VARIANT LPC1769)
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set(JLINK_DEVICE LPC1769)
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set(PYOCD_TARGET LPC1769)
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set(NXPLINK_DEVICE LPC1769:LPC1769)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc1769.ld)
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function(update_board TARGET)
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# nothing to do
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endfunction()
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@@ -0,0 +1,83 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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||||
* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
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||||
*
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||||
* The above copyright notice and this permission notice shall be included in
|
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* all copies or substantial portions of the Software.
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||||
*
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||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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/* metadata:
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name: LPCXpresso1769
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url: https://www.nxp.com/design/design-center/development-boards-and-designs/OM13000
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define LED_PORT 0
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#define LED_PIN 22
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#define LED_STATE_ON 1
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// JOYSTICK_DOWN if using LPCXpresso Base Board
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#define BUTTON_PORT 0
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#define BUTTON_PIN 15
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#define BUTTON_STATE_ACTIVE 0
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#define BOARD_UART_PORT LPC_UART3
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/* System oscillator rate and RTC oscillator rate */
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const uint32_t OscRateIn = 12000000;
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const uint32_t RTCOscRateIn = 32768;
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// Pin muxing configuration
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static const PINMUX_GRP_T pinmuxing[] = {
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{0, 0, IOCON_MODE_INACT | IOCON_FUNC2}, /* TXD3 */
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{0, 1, IOCON_MODE_INACT | IOCON_FUNC2}, /* RXD3 */
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{LED_PORT, LED_PIN, IOCON_MODE_INACT | IOCON_FUNC0}, /* Led 0 */
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/* Joystick buttons. */
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// {2, 3, IOCON_MODE_INACT | IOCON_FUNC0}, /* JOYSTICK_UP */
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{BUTTON_PORT, BUTTON_PIN, IOCON_FUNC0 | IOCON_MODE_PULLUP}, /* JOYSTICK_DOWN */
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// {2, 4, IOCON_MODE_INACT | IOCON_FUNC0}, /* JOYSTICK_LEFT */
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// {0, 16, IOCON_MODE_INACT | IOCON_FUNC0}, /* JOYSTICK_RIGHT */
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// {0, 17, IOCON_MODE_INACT | IOCON_FUNC0}, /* JOYSTICK_PRESS */
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};
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static const PINMUX_GRP_T pin_usb_mux[] = {
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{0, 29, IOCON_MODE_INACT | IOCON_FUNC1}, // D+
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{0, 30, IOCON_MODE_INACT | IOCON_FUNC1}, // D-
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{2, 9, IOCON_MODE_INACT | IOCON_FUNC1}, // Soft Connect
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{1, 19, IOCON_MODE_INACT | IOCON_FUNC2}, // USB_PPWR (Host mode)
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// VBUS is not connected on this board, so leave the pin at default setting.
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/// Chip_IOCON_PinMux(LPC_IOCON, 1, 30, IOCON_MODE_INACT, IOCON_FUNC2); // USB VBUS
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};
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -0,0 +1,8 @@
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/lpc1769.ld
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# For flash-jlink target
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JLINK_DEVICE = LPC1769
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# flash using jlink
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flash: flash-jlink
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@@ -0,0 +1,202 @@
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/*
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* GENERATED FILE - DO NOT EDIT
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* (c) Code Red Technologies Ltd, 2008-2013
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* (c) NXP Semiconductors 2013-2019
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* Generated linker script file for LPC1769
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* Created from linkscript.ldt by FMCreateLinkLibraries
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* Using Freemarker v2.3.23
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* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 14, 2019 6:39:29 PM
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*/
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MEMORY
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{
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/* Define each memory region */
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MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
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RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
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RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */
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}
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/* Define a symbol for the top of each memory region */
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__base_MFlash512 = 0x0 ; /* MFlash512 */
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__base_Flash = 0x0 ; /* Flash */
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__top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */
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__top_Flash = 0x0 + 0x80000 ; /* 512K bytes */
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__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */
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__base_RAM = 0x10000000 ; /* RAM */
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__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
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__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
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__base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */
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__base_RAM2 = 0x2007c000 ; /* RAM2 */
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__top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */
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__top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */
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ENTRY(ResetISR)
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SECTIONS
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{
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/* MAIN TEXT SECTION */
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.text : ALIGN(4)
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{
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FILL(0xff)
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__vectors_start__ = ABSOLUTE(.) ;
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KEEP(*(.isr_vector))
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/* Global Section Table */
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. = ALIGN(4) ;
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__section_table_start = .;
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__data_section_table = .;
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LONG(LOADADDR(.data));
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LONG( ADDR(.data));
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LONG( SIZEOF(.data));
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LONG(LOADADDR(.data_RAM2));
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LONG( ADDR(.data_RAM2));
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LONG( SIZEOF(.data_RAM2));
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__data_section_table_end = .;
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__bss_section_table = .;
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LONG( ADDR(.bss));
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LONG( SIZEOF(.bss));
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LONG( ADDR(.bss_RAM2));
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LONG( SIZEOF(.bss_RAM2));
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__bss_section_table_end = .;
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__section_table_end = . ;
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/* End of Global Section Table */
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*(.after_vectors*)
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} > MFlash512
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.text : ALIGN(4)
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{
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*(.text*)
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*(.rodata .rodata.* .constdata .constdata.*)
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. = ALIGN(4);
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} > MFlash512
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/*
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* for exception handling/unwind - some Newlib functions (in common
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* with C++ and STDC++) use this.
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*/
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.ARM.extab : ALIGN(4)
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > MFlash512
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__exidx_start = .;
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.ARM.exidx : ALIGN(4)
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > MFlash512
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__exidx_end = .;
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_etext = .;
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/* DATA section for RamAHB32 */
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.data_RAM2 : ALIGN(4)
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{
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FILL(0xff)
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PROVIDE(__start_data_RAM2 = .) ;
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*(.ramfunc.$RAM2)
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*(.ramfunc.$RamAHB32)
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*(.data.$RAM2*)
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*(.data.$RamAHB32*)
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. = ALIGN(4) ;
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PROVIDE(__end_data_RAM2 = .) ;
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} > RamAHB32 AT>MFlash512
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/* MAIN DATA SECTION */
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.uninit_RESERVED : ALIGN(4)
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{
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KEEP(*(.bss.$RESERVED*))
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. = ALIGN(4) ;
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_end_uninit_RESERVED = .;
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} > RamLoc32
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/* Main DATA section (RamLoc32) */
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.data : ALIGN(4)
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{
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FILL(0xff)
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_data = . ;
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*(vtable)
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*(.ramfunc*)
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*(.data*)
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. = ALIGN(4) ;
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_edata = . ;
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} > RamLoc32 AT>MFlash512
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/* BSS section for RamAHB32 */
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.bss_RAM2 : ALIGN(4)
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{
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PROVIDE(__start_bss_RAM2 = .) ;
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*(.bss.$RAM2*)
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*(.bss.$RamAHB32*)
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. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
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PROVIDE(__end_bss_RAM2 = .) ;
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} > RamAHB32
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/* MAIN BSS SECTION */
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.bss : ALIGN(4)
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{
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_bss = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(4) ;
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_ebss = .;
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/* PROVIDE(end = .);*/
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} > RamLoc32
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/* NOINIT section for RamAHB32 */
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.noinit_RAM2 (NOLOAD) : ALIGN(4)
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{
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*(.noinit.$RAM2*)
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*(.noinit.$RamAHB32*)
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. = ALIGN(4) ;
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} > RamAHB32
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/* DEFAULT NOINIT SECTION */
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.noinit (NOLOAD): ALIGN(4)
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{
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_noinit = .;
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*(.noinit*)
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. = ALIGN(4) ;
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_end_noinit = .;
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} > RamLoc32
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/* hathach add heap section for clang */
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.heap (NOLOAD): {
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__heap_start = .;
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||||
__HeapBase = .;
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||||
__heap_base = .;
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__end = .;
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PROVIDE(end = .);
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PROVIDE(_end = .);
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PROVIDE(__end__ = .);
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KEEP(*(.heap*))
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__HeapLimit = .;
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||||
__heap_limit = .;
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__heap_end = .;
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} > RamLoc32
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/* PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);*/
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PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
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||||
/* ## Create checksum value (used in startup) ## */
|
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/* This cause issue with clang linker, so it is disabled */
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/* MemManage_Handler, BusFault_Handler, UsageFault_Handler may not be defined */
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PROVIDE(__valid_user_code_checksum = 0 -
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(_vStackTop
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+ (ResetISR + 1)
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+ (NMI_Handler + 1)
|
||||
+ (HardFault_Handler + 1)
|
||||
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)
|
||||
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)
|
||||
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1)
|
||||
) );
|
||||
|
||||
/* Provide basic symbols giving location and size of main text
|
||||
* block, including initial values of RW data sections. Note that
|
||||
* these will need extending to give a complete picture with
|
||||
* complex images (e.g multiple Flash banks).
|
||||
*/
|
||||
_image_start = LOADADDR(.text);
|
||||
_image_end = LOADADDR(.data) + SIZEOF(.data);
|
||||
_image_size = _image_end - _image_start;
|
||||
}
|
||||
@@ -0,0 +1,11 @@
|
||||
set(MCU_VARIANT LPC1768)
|
||||
|
||||
set(JLINK_DEVICE LPC1768)
|
||||
set(PYOCD_TARGET LPC1768)
|
||||
set(NXPLINK_DEVICE LPC1768:LPC1768)
|
||||
|
||||
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc1768.ld)
|
||||
|
||||
function(update_board TARGET)
|
||||
# nothing to do
|
||||
endfunction()
|
||||
@@ -0,0 +1,76 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
/* metadata:
|
||||
name: mbed 1768
|
||||
url: https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc1700-arm-cortex-m3/arm-mbed-lpc1768-board:OM11043
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H_
|
||||
#define BOARD_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define LED_PORT 1
|
||||
#define LED_PIN 18
|
||||
#define LED_STATE_ON 1
|
||||
|
||||
// JOYSTICK_DOWN if using LPCXpresso Base Board
|
||||
#define BUTTON_PORT 0
|
||||
#define BUTTON_PIN 15
|
||||
#define BUTTON_STATE_ACTIVE 0
|
||||
|
||||
#define BOARD_UART_PORT LPC_UART3
|
||||
|
||||
/* System oscillator rate and RTC oscillator rate */
|
||||
const uint32_t OscRateIn = 10000000;
|
||||
const uint32_t RTCOscRateIn = 32768;
|
||||
|
||||
// Pin muxing configuration
|
||||
static const PINMUX_GRP_T pinmuxing[] = {
|
||||
{LED_PORT, LED_PIN, IOCON_MODE_INACT | IOCON_FUNC0},
|
||||
{BUTTON_PORT, BUTTON_PIN, IOCON_FUNC0 | IOCON_MODE_PULLUP},
|
||||
};
|
||||
|
||||
static const PINMUX_GRP_T pin_usb_mux[] = {
|
||||
{0, 29, IOCON_MODE_INACT | IOCON_FUNC1}, // D+
|
||||
{0, 30, IOCON_MODE_INACT | IOCON_FUNC1}, // D-
|
||||
{2, 9, IOCON_MODE_INACT | IOCON_FUNC1}, // Soft Connect
|
||||
|
||||
{1, 19, IOCON_MODE_INACT | IOCON_FUNC2}, // USB_PPWR (Host mode)
|
||||
{1, 22, IOCON_MODE_INACT | IOCON_FUNC2}, // USB_PWRD
|
||||
|
||||
// VBUS is not connected on this board, so leave the pin at default setting.
|
||||
// Chip_IOCON_PinMux(LPC_IOCON, 1, 30, IOCON_MODE_INACT, IOCON_FUNC2); // USB VBUS
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,9 @@
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = $(BOARD_PATH)/lpc1768.ld
|
||||
|
||||
# For flash-jlink target
|
||||
JLINK_DEVICE = LPC1768
|
||||
PYOCD_TARGET = lpc1768
|
||||
|
||||
# flash using pyocd
|
||||
flash: flash-pyocd
|
||||
@@ -0,0 +1,202 @@
|
||||
/*
|
||||
* GENERATED FILE - DO NOT EDIT
|
||||
* (c) Code Red Technologies Ltd, 2008-2013
|
||||
* (c) NXP Semiconductors 2013-2019
|
||||
* Generated linker script file for LPC1769
|
||||
* Created from linkscript.ldt by FMCreateLinkLibraries
|
||||
* Using Freemarker v2.3.23
|
||||
* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 14, 2019 6:39:29 PM
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* Define each memory region */
|
||||
MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
|
||||
RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
|
||||
RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */
|
||||
}
|
||||
|
||||
/* Define a symbol for the top of each memory region */
|
||||
__base_MFlash512 = 0x0 ; /* MFlash512 */
|
||||
__base_Flash = 0x0 ; /* Flash */
|
||||
__top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */
|
||||
__top_Flash = 0x0 + 0x80000 ; /* 512K bytes */
|
||||
__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */
|
||||
__base_RAM = 0x10000000 ; /* RAM */
|
||||
__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||
__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
|
||||
__base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */
|
||||
__base_RAM2 = 0x2007c000 ; /* RAM2 */
|
||||
__top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */
|
||||
__top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */
|
||||
|
||||
ENTRY(ResetISR)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* MAIN TEXT SECTION */
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
__vectors_start__ = ABSOLUTE(.) ;
|
||||
KEEP(*(.isr_vector))
|
||||
/* Global Section Table */
|
||||
. = ALIGN(4) ;
|
||||
__section_table_start = .;
|
||||
__data_section_table = .;
|
||||
LONG(LOADADDR(.data));
|
||||
LONG( ADDR(.data));
|
||||
LONG( SIZEOF(.data));
|
||||
LONG(LOADADDR(.data_RAM2));
|
||||
LONG( ADDR(.data_RAM2));
|
||||
LONG( SIZEOF(.data_RAM2));
|
||||
__data_section_table_end = .;
|
||||
__bss_section_table = .;
|
||||
LONG( ADDR(.bss));
|
||||
LONG( SIZEOF(.bss));
|
||||
LONG( ADDR(.bss_RAM2));
|
||||
LONG( SIZEOF(.bss_RAM2));
|
||||
__bss_section_table_end = .;
|
||||
__section_table_end = . ;
|
||||
/* End of Global Section Table */
|
||||
|
||||
*(.after_vectors*)
|
||||
|
||||
} > MFlash512
|
||||
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
*(.text*)
|
||||
*(.rodata .rodata.* .constdata .constdata.*)
|
||||
. = ALIGN(4);
|
||||
} > MFlash512
|
||||
/*
|
||||
* for exception handling/unwind - some Newlib functions (in common
|
||||
* with C++ and STDC++) use this.
|
||||
*/
|
||||
.ARM.extab : ALIGN(4)
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > MFlash512
|
||||
|
||||
__exidx_start = .;
|
||||
|
||||
.ARM.exidx : ALIGN(4)
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > MFlash512
|
||||
__exidx_end = .;
|
||||
|
||||
_etext = .;
|
||||
|
||||
/* DATA section for RamAHB32 */
|
||||
|
||||
.data_RAM2 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
PROVIDE(__start_data_RAM2 = .) ;
|
||||
*(.ramfunc.$RAM2)
|
||||
*(.ramfunc.$RamAHB32)
|
||||
*(.data.$RAM2*)
|
||||
*(.data.$RamAHB32*)
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__end_data_RAM2 = .) ;
|
||||
} > RamAHB32 AT>MFlash512
|
||||
/* MAIN DATA SECTION */
|
||||
.uninit_RESERVED : ALIGN(4)
|
||||
{
|
||||
KEEP(*(.bss.$RESERVED*))
|
||||
. = ALIGN(4) ;
|
||||
_end_uninit_RESERVED = .;
|
||||
} > RamLoc32
|
||||
|
||||
/* Main DATA section (RamLoc32) */
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
_data = . ;
|
||||
*(vtable)
|
||||
*(.ramfunc*)
|
||||
*(.data*)
|
||||
. = ALIGN(4) ;
|
||||
_edata = . ;
|
||||
} > RamLoc32 AT>MFlash512
|
||||
|
||||
/* BSS section for RamAHB32 */
|
||||
.bss_RAM2 : ALIGN(4)
|
||||
{
|
||||
PROVIDE(__start_bss_RAM2 = .) ;
|
||||
*(.bss.$RAM2*)
|
||||
*(.bss.$RamAHB32*)
|
||||
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
|
||||
PROVIDE(__end_bss_RAM2 = .) ;
|
||||
} > RamAHB32
|
||||
|
||||
/* MAIN BSS SECTION */
|
||||
.bss : ALIGN(4)
|
||||
{
|
||||
_bss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4) ;
|
||||
_ebss = .;
|
||||
/* PROVIDE(end = .);*/
|
||||
} > RamLoc32
|
||||
|
||||
/* NOINIT section for RamAHB32 */
|
||||
.noinit_RAM2 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM2*)
|
||||
*(.noinit.$RamAHB32*)
|
||||
. = ALIGN(4) ;
|
||||
} > RamAHB32
|
||||
|
||||
/* DEFAULT NOINIT SECTION */
|
||||
.noinit (NOLOAD): ALIGN(4)
|
||||
{
|
||||
_noinit = .;
|
||||
*(.noinit*)
|
||||
. = ALIGN(4) ;
|
||||
_end_noinit = .;
|
||||
} > RamLoc32
|
||||
|
||||
/* hathach add heap section for clang */
|
||||
.heap (NOLOAD): {
|
||||
__heap_start = .;
|
||||
__HeapBase = .;
|
||||
__heap_base = .;
|
||||
__end = .;
|
||||
PROVIDE(end = .);
|
||||
PROVIDE(_end = .);
|
||||
PROVIDE(__end__ = .);
|
||||
KEEP(*(.heap*))
|
||||
__HeapLimit = .;
|
||||
__heap_limit = .;
|
||||
__heap_end = .;
|
||||
} > RamLoc32
|
||||
|
||||
/* PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);*/
|
||||
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
|
||||
|
||||
/* ## Create checksum value (used in startup) ## */
|
||||
/* This cause issue with clang linker, so it is disabled */
|
||||
/* MemManage_Handler, BusFault_Handler, UsageFault_Handler may not be defined */
|
||||
PROVIDE(__valid_user_code_checksum = 0 -
|
||||
(_vStackTop
|
||||
+ (ResetISR + 1)
|
||||
+ (NMI_Handler + 1)
|
||||
+ (HardFault_Handler + 1)
|
||||
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)
|
||||
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)
|
||||
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1)
|
||||
) );
|
||||
|
||||
/* Provide basic symbols giving location and size of main text
|
||||
* block, including initial values of RW data sections. Note that
|
||||
* these will need extending to give a complete picture with
|
||||
* complex images (e.g multiple Flash banks).
|
||||
*/
|
||||
_image_start = LOADADDR(.text);
|
||||
_image_end = LOADADDR(.data) + SIZEOF(.data);
|
||||
_image_size = _image_end - _image_start;
|
||||
}
|
||||
Reference in New Issue
Block a user